Job Description:

The selected candidate will have to handle RTL design implementation, simulation verification, FPGA verification,

Chip integration (floorplan design, package bonding, chip synthesis, and STA) as well as handling SoC design flow.

Job Requirements:

• Master degree in EE-related engineering major is required as a minimum from a reputed college.

• Familiar with Verilog Design

• Familiar with Xilinx FPGA platform

• Familiar with SoC design flow, such as integration, synthesis, DFT, STA, LEC, power analysis, etc…

• Written and verbal communication skills.

• Ability to profile the values, requirements, issues, risks, and solutions for engineering works.

• Fast learner, motivated to work in a startup environment.

KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator.

We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design.

With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA.

This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers.

KaiKuTek is looking for enthusiastic digital IC design engineers willing to take upon new challenges of working closely with cross functional teams, including analog/RFIC designers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.