NVIDIA_新加坡商輝達開發有限公司台灣分公司
Senior Power Architect
11/14 Updated
Full-time
Manager/Director
0 ~ 5 applicants

Salary & Location

Salary negotiable
(Regular monthly salary of NT$40,000 or above)
新竹市

Required

Work Experience
5年以上

Job Description

We are now looking for a Silicon Power Architect (Definition to Implementation).
NVIDIA is seeking a Senior Power Architect to help us build power efficient and performance leading SOC's. This position offers the opportunity to have real impact in a dynamic, technology-focused company across product lines ranging from consumer graphics, to super computers, to self-driving cars, to AI. As a member of the architecture team, you will collaborate with other Architects, Software Engineers, Circuit Designers, ASIC Design Engineers, and System Engineers to study, devise and implement the power management strategy for NVIDIA's SOC roadmap.
What you'll be doing:
1. Propose innovations to improve performance, reduce power, and reduce cost of the next generation of NVIDIA SOCs used across a wide array of industries and applications.
2. Develop models of our SOCs and platforms in order to understand and analyze their response under various conditions and use cases.
3. Perform detailed analytical studies of platform power and performance tradeoffs.
4. Develop specifications detailing our chip and platform power management solutions for internal and external consumption.
5. Work with teams throughout the company (RTL, PD, Circuit, SI, Thermal, SW, Platform, Operations, Marketing, etc...) to deliver innovative power solutions.
What we need to see:
1. Bachelor or Master’s degree (or equivalent experience)
2. 8+ years of experience with silicon power management architecture techniques.
3. Successfully driven chip and system level architectural issues from inception through production.
4. Deep understanding of power principles and tradeoffs.
5. Strong interpersonal and teamwork skills.
6. An aim to continuously learn and expand architectural breadth and depth.
Ways to stand out from the crowd:
1. ARM or other microprocessor experience.
Number of Openings
1~3人
Educational Requirements
大學(學院)以上
Work Schedule
日班
Leave Policy
依公司規定
Job Category
Digital IC Design Engineer
IC Layout Engineer
0 ~ 5 applicants