NVIDIA_新加坡商輝達開發有限公司台灣分公司
English Required
Senior Mixed Signal Design Engineer (SerDes, High Speed) - Taipei/Hsinchu
11/14 Updated
Full-time
Mid to Senior Level
English RequiredSalary & Location
Salary negotiable
(Regular monthly salary of NT$40,000 or above)
新竹市
Required
Language Requirements
English
聽/中等、說/中等、讀/中等、寫/中等
Work Experience
2年以上
Job Description
We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
You will be responsible for the development and implementation of high speed interfaces, including TX/RX/Clocking/PLL. You will have hands on experience taking innovative integrated circuit designs at data rates of 50Gbps and higher from concept through silicon characterization.
What you will be dong:
- Define circuit requirements and complete design from schematic, layout, and verification to characterization.
- Conduct schematic design of deep-submicron CMOS technologies using Spectre, Hspice or like.
- Take responsibility for the architecture, transistor design and verification using industry standard EDA tools such as Cadence virtuoso.
- Optimize circuit to meet the specifications for system performance.
- Work with layout engineers by providing detailed floorplan and guidance for matching and high-speed routings.
- Provide support for post-silicon bring-up and debugging.
What we need to see:
- Master of Science or foreign equivalent degree in Electrical Engineering, Computer Engineering or related field with strong analog design background.
- Minimum 2 years analog design experience in industry
- CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET)
- Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA)
- Experience in crafting test bench environments for component and top level circuit verification
- Behavioral modeling of analog and digital circuits
- Strong debugging and analytical skills
- Analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, monte-carlo, etc.
- Strong communication skills and ability & desire to work as a great teammate are huge plus.
- All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability or protected veteran status.
Number of Openings
1~1人
Educational Requirements
碩士以上
Field of Study Requirements
資訊工程相關、電機電子工程相關
Work Schedule
日班
Leave Policy
依公司規定
Job Category
Analog IC Design Engineer
