台灣聯想環球科技股份有限公司
FPGA Engineer
10/11 Updated
Full-time
Entry-level
11 ~ 30 applicants

Salary & Location

Annual SalaryNT$ 1,800,000+
台北市南港區

Required

Work Experience
不拘

Job Description

Job Description:
1. Design and implement the FPGA/CPLD function on the server motherboard and related sub cards.
2. Complete FPGA/CPLD code writing and implementation, build simulation platform, and execute simulation test and on-board test.
3. Write documents related to FPGA/CPLD design and testing.
4. Inspect relevant parts of FPGA/CPLD of schematic diagram.
5. Support debugging FPGA/CPLD related problems during the whole development process.
6. Business trip supports power on experiment of new products.
Job Requirements:
1. Proficient in CPLD development process, familiar with Lattice,Xilinx and Intel FPGA chips.
2. Proficient in Verilog language. Proficient in using Diamond,Vivado and Quartus development tools. Proficient in using modelsim simulation software.
3. Familiar with I2C, SPI, ESPI and other common communication interfaces.
4. More than 8 years of FPGA/CPLD development experience.
5. Have strong ability to communicate and cooperate with others.
6. Server product development experience is preferred.
Number of Openings
1~1人
Educational Requirements
不拘
Work Schedule
日班
Leave Policy
依公司規定
Job Category
Digital IC Design Engineer
Hardware Development Engineer
Electronic Product System Engineer
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11 ~ 30 applicants