Job Descriptions: IPs of multimdedia SOC include video and audio proceesing, picture quality enhancement, bus arbitration,high frequence IO interface, Video coding protocol, SOC platform, and so on. All IPs with the below tasks, - RTL studying, planning structure, coding, simulation. - Coworking with Design verification team for simulation, verification, coverage. - Using design EDA tools, such as ncverilog, VCS for sim, prime time for STA and power analysis, linting tools and so on. - IC verification and debug. - Discuss the architecture of next chip with SW and Digital IC leaders for next chip. - Co-work with SW designer to solve Customers' issues. Job Requirements > Minimum Qualifications - Ability of communicating, reading, and writing by English - Master's degree or over in Electrical Engineering, Computer Science, Mathematical or related science & engineering field. Or Bachelor with over 2 years working experience in the field of digital IC design. - Familiar with at least one programming language, such as HDL, C-like, Perl-like and so on. > Preferred Qualifications - Knowing how software works, such as IRQ, limitation, and etc. - Experience of display timing. - Strong processor or SoC architecture knowledge - Microarchitecture implementation - Microprocessor integration - Low power Design - Excellent verbal and written communication skills. Ability to work in a team environment. Good self-direction and time management skills - Develop RTL for multiple logic blocks of a DSP/CPU core - Run various frontend tools to check for linting, clock domain crossing, synthesis, etc. - Work with physical design team on design constrain and timing closure - Work with power team on power optimization - Work with verification team to collaborate on test plan, coverage plan, and coverage closure. Excellent verbal and written communication skills. Ability to work in a team environment. Good self-direction and time management skills - Passion to co-work with tens of partners and to summary information.

工作項目： 1. 瑞昱企業大學六大學院課程開發、規劃與推動。 2. 協同管理教育訓練各項業務及各項專案企劃與執行。 3. 管理與推動企業整體e-learning機制及數位課程再造。 4. 規劃與執行組織文化活動。 5. 發展與培育內部教育訓練課程講師，並擔任體驗式課程講師。 6. 協同管理教育訓練管理辦法與應對內外部稽核。 7. 推動/擴展瑞昱員工個人發展計劃。 應徵條件： 1. 大學以上；企業管理/人力資源管理/管理科學/科技管理/商學/教育等相關科系畢業為主。 2. 具人力資源工作3年(含)以上經驗者，有教育訓練規劃經驗者佳。 3. 具整體企業教育訓練規劃及專案企劃能力。 4. 具備教育訓練實務經驗或擔任講師/主持經驗者佳。 5. 主動積極、善溝通協調、高度服務熱忱，具良好邏輯思考、組織與推演能力。 6. 有正向工作認知、聰穎細心、抗壓性高、目標導向，擅於團隊協同。

工作項目： 1. Software and utility development for ARM Architecture based Complex CPU Subsystem Platform 2. CPU function validation and testing software development 3. CPU post-silicon issue analysis, debug & resolving 應徵條件： 1. 碩士以上; 資訊工程、資訊科學、電機工程、電子工程等相關科系畢業。 2. 熟悉 ARMv7/v8/v9-A CPU 架構，有 ARM Cortex-A CPU system software 經驗尤佳。 3. 熟悉以下經驗者： (a) CPU 之系統程式或工具開發。 (b) CPU/OS之 debug 及問題分析。 (c) CPU post-silicon issue analysis, debug & resolving。 (d) 具備 Verilog RTL 及相關工具軟體開發經驗。 4. 積極負責、溝通協調能力強、勇於迎接挑戰，對於 High-Performance CPU Technology 有興趣者。

工作項目：擔任人力資源團隊於瑞昱二廠Service Account之專責夥伴。 1. 瑞昱二廠招募面談管理及任用作業。 2. 協同人資團隊各單位於二廠綜合業務之推動運作。 3. 推動創新人才招募專案開發任務。 4. 協同人力資源綜合業務發展與推動。 應徵條件： 1. 學士以上; 人力資源管理、企業管理、勞工、心理、科技管理或行銷管理等相關科系畢業為主。 2. 工作年資：人力資源或專案管理相關業務工作年資2至5年者為佳。 3. 具備規劃人力資源暨整合行政管理專案/企劃經驗者為佳。 4. 具正向工作認知與良好自我管理能力、聰穎細心、抗壓性高、主動積極、善溝通協調、具高度服務熱忱、樂於團隊合作。