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英屬開曼群島商世芯股份有限公司台灣分公司(世芯-KY:3661),總部設於臺灣臺北,專為高複雜度,高產量SoC設計提供矽設計及量產服務。世芯成立於2003年,由一群來自矽谷及日本的優秀工程師創辦。隨著IC設計技術複雜度的提高和產品快速上市的需求,世芯致力於為客戶提供最高效益/成本比的解決方案,確保客戶一次投片成功並快速將產品導入市場。世芯的目標客戶主要針對成長快速且追求量大市場的IC供應商/系統廠商,這些應用市場包含娛樂裝置、手機,高畫質電視,通訊設備,電腦及其他消費性電子產品的IC。世芯成立以來,已完成眾多高階製程及高複雜度SoC設計的成功案例,並於2014年10月28日掛牌上市。更多關於世芯的介紹請參考公司網站:http://www.alchip.com
台北總公司:台北市內湖區文湖街12號9樓 (02)2799-2318
新竹分公司:新竹縣竹北市台元科技園區台元一街1號11樓之1(03)560-1218
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Trang công ty
Sản phẩm chính
1. High-end SoC design services 高階特殊應用晶片設計服務
2. ASIC turnkey services 產品工程服務
Chế độ phúc lợi
1.分紅奬金 (依公司獲利、組織目標達成率與個人績效決定)
2.三節獎金
3.勞健保及退休金提撥
4.員工團保 (意外、壽險及防癌險)
5.國內外旅遊/旅遊補助
6.工程師介紹獎金
7.全薪病假及彈性休假
8.員工汽機車停車位或交通津貼
9.員工健康檢查
10.福委會相關福利活動
Môi trường công ty
Cơ hội việc làm
Staff Physical Design Engineer
英屬開曼群島商世芯股份有限公司台灣分公司
Thỏa thuận
台北市內湖區
5年以上
1. Responsible for the digital back-end physical implementation from netlist to GDS, completing the chip sign-off process.
2. Complete the full-chip floorplanning, including chip partitioning, power and ground network, placement of critical modules, utilization optimization, pin assignment.
3. Complete the overall digital back-end design of the chip, including placement, clock tree implementation, timing closure, power calculation, IR drop analysis, SI closure, and physical verification.
4. Co-work with front-end design team for the logic, clock and timing optimization.
5. Co-work with package team for the substrate design and SIPI simulations.
Toàn thời gian
Cấp Quản lý/Giám đốc
Tiếng Anh Điều kiện
10/18 Cập nhật
哎呀!目前條件搜尋結果有點少
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