給与 & 勤務地
月給NT$ 80,000~250,000
新竹縣竹北市
条件要件
職務経験
不拘
職務内容
Job Title: NPU Modeling Engineer
Job Description:
Overview:
We are seeking an experienced NPU Architect to join our team. As an NPU Architect, you will play a crucial role in designing and implementing the hardware model for our Neural Processing Unit. Your expertise will be instrumental in ensuring efficient and accurate execution of neural network workloads on our NPU.
Responsibilities:
1. NPU Architecture Design:
• Collaborate with cross-functional teams to define the architecture and specifications for the NPU.
• Design the NPU's core components, including the PE array, memory hierarchy, and control logic.
• Optimize for performance, power efficiency, and scalability.
2. Bit-True Hardware Model Implementation:
• Develop a bit-true hardware model of the NPU in C language.
• Ensure that the model accurately represents the NPU's behavior, including arithmetic operations, memory access, and control flow.
• Validate the model against reference neural network workloads.
3. Cycle-Accurate Modeling:
• Create a cycle-accurate model of the NPU to simulate its behavior at the clock cycle level.
• Account for pipeline stages, data dependencies, and timing constraints.
• Use tools like Verilog, system-Verilog, or specialized simulation environments to achieve cycle-accurate modeling.
4. Performance Analysis and Optimization:
• Profile the NPU model to identify bottlenecks and areas for improvement.
• Propose and implement optimizations to enhance performance and reduce latency.
• Collaborate with software teams to fine-tune the NPU's behavior.
5. Verification and Validation:
• Create testbenches and test vectors to validate both the bit-true and cycle-accurate models.
• Conduct functional and performance testing to ensure correctness and compliance with specifications.
• Debug and resolve any discrepancies between the models and the actual NPU.
6. Documentation and Communication:
• Document the NPU architecture, design decisions, and implementation details.
• Present findings, progress, and challenges to stakeholders and management.
• Collaborate with software engineers, firmware developers, and system architects.
Qualifications:
• Master's or Ph.D. degree in Electrical Engineering, Computer Science, or a related field.
• Minimum of 3 years of experience in NPU architecture design and implementation.
• Proficiency in C/C++/Verilog/System-Verilog programming for hardware modeling.
• Familiarity with systolic arrays, matrix multiplication, and neural network accelerators.
• Knowledge of bit-true modeling, fixed-point arithmetic, and floating-point arithmetic.
• Experience with verification tools and simulation environments.
• Strong analytical and problem-solving skills.
• Excellent communication and teamwork abilities.
• Attention to detail and commitment to quality.
If you are passionate about NPU architecture, hardware modeling, and want to be part of a team driving innovation, we encourage you to apply. Join us in shaping the future of AI!
応募者数
1~2人
学歴要件
碩士以上
専攻要件
資訊工程相關、電機電子工程相關
勤務時間
日班
休暇制度
依公司規定
スキル要件
Structured Programming
Machine Learning
Hardware Language Programming
Digital Chip Product Development
Digital Circuit Analysis & Design
Digital Circuit Verification
結構化程式設計 Machine Learning 撰寫硬體語言程式 數位晶片產品開發 數位電路分析設計 數位電路驗證
職種カテゴリ
Software Engineer
Digital IC Design Engineer
新竹縣竹北市
IC設計相關業
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Generative AI NPU and Application
