緯穎科技服務股份有限公司
Signal Integrity Validation工程師(無經驗可)
11/1 更新
全職
初階
英文 條件要求
11 ~ 30 應徵者

職務概況

待遇面議
(經常性薪資達 4 萬元或以上)
新北市汐止區

條件要求

語文條件
英文
聽/中等、說/中等、讀/中等、寫/中等
工作經歷
不拘

職務描述

【Job Description】
1. Working directly with HW/Layout design teams to evaluate design tradeoffs and optimize design performance/risk/cost/manufacturability.
2. Driving next generation compliance specification studies
3. Perform signal integrity validation of Server/Storage/Switch products
4. Analysis of multi-gigabit serial links and DDR4 and their compliance to standards
5. Driving physical measurements to collect data for design validation and simulation correlations
6. Driving validation flow enhancements and automation - improving performance and efficiency
【Other Qualifications】
Self-motivation, Strong teamwork, Strong communication skills and Out of the box thinking with the strong desire to innovate are essential.
需求人數
1~2人
學歷要求
大學(學院)以上
科系要求
電機電子工程相關、通信學類
上班時段
日班
休假制度
依公司規定
職務類別
RF Communication Engineer
Telecommunications/Communication System Engineer
Hardware Development Engineer
11 ~ 30 應徵者